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MoBL
®
CY62148EV30
Document #: 38-05576 Rev. *G Page 6 of 12
Switching Waveforms
Figure 1. Read Cycle No. 1 (Address Transition Controlled)
[16, 17]
Figure 2. Read Cycle No. 2 (OE Controlled)
[17, 18]
Figure 3. Write Cycle No. 1 (WE Controlled, OE HIGH During Write)
[19, 20]
PREVIOUS DATA VALID DATA VALID
RC
t
AA
t
OHA
tRC
ADDRESS
DATA OUT
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
IMPEDANCE
I
CC
I
SB
HIGH
ADDRESS
CE
DATA OUT
V
CC
SUPPLY
CURRENT
OE
DATA VALID
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
ADDRESS
CE
WE
DATA IO
OE
NOTE
21
Notes
16. Device is continuously selected. OE
, CE = V
IL
.
17. WE
is HIGH for read cycles.
18. Address valid before or similar to CE
transition LOW.
19. Data IO is high impedance if OE
= V
IH
.
20. If CE
goes HIGH simultaneously with WE HIGH, the output remains in high impedance state.
21. During this period, the IOs are in output state. Do not apply input signals.
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