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Appendix D: Performance Verification
73A-270 Arbitrary Pulse/Pattern Generator Module
59
73A-270 Test Record (Cont.)
TTL OUT B Checks MaximumMeasured ValueMinimum
P
u
lse
Du
r
a
tio
n Mu
ltiplier
1000 × 100 ns 4,999.5 Hz 5,000.5 Hz
100 × 1 ms 4,999.5 Hz 5,000.5 Hz
10 × 10 ms
4,999.5 Hz 5,000.5 Hz
1 × 100 ms 4,999.5 Hz 5,000.5 Hz
2 × 100 ms 2,499.75 Hz 2,500.25 Hz
8
5
.8
5
8
5
ms
±20 n
s
.ms s
85.85848 ms 85.85852 ms
42
.
4242
ms
±20 n
s
42.42418 ms 42.42422 ms
Passed Failed
Bu
rst
P
a
tter
n 42 × 1100 ms
21 × 1100 ms
BPLR OUT A Checks Minimum Measured Value (voltage & phase) Maximum
V
olt
ag
e
± 2 V ± 260 mV ± 1.740 V ± 2.260 V
± 5 V ± 260 mV ± 4.740 V ± 5.260 V
± 8.7 V ± 260 mV ± 7.740 V ± 8.260 V
Opposite Phase with TTL OUT ± 8.7 V ± 260 mV ± 7.740 V ± 8.260 V
± 0 V ± 260 mV ± 0.240 V ± 0.240 V
BPLR OUT B Checks Minimum Measured Value (voltage & phase) Maximum
V
olt
ag
e
± 2 V ± 260 mV ± 1.740 V ± 2.260 V
± 5 V ± 260 mV ± 4.740 V ± 5.260 V
± 8.7 V ± 260 mV ± 7.740 V ± 8.260 V
Opposite Phase with TTL OUT ± 8.7 V ± 260 mV ± 7.740 V ± 8.260 V
± 0 V ± 260 mV ± 0.240 V ± 0.260 V
Triggering & Breakpoint for Channel A Passed Failed
T
ri
gg
er
Li
n
es
TTLTRG0*
TTLTRG1*
TTLTRG2*
TTLTRG3*
TTLTRG4*
TTLTRG5*
TTLTRG6*
TTLTRG7*
EXT TRG A
Breakpoint