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2PeripheralArchitecture
2.1ClockControl
2.2SignalDescriptions
2.3IndexedandNon-IndexedRegisters
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PeripheralArchitecture
InformationrelatedtoclockgenerationandcontrolfortheUSBperipheralwillbeaddedinafuturerevision
ofthisdocument.ClocksforUSBaregeneratedbasedonacrystaloscillatorontheM24XIandM24XO
pins.TheoscillatorisenabledbybitOSCPDWNoftheUSBPHY_CTLregisterinthesystemmodule.
TheUSBcontrollerprovidesthefollowingI/Osignals.Table1showstheUSBportpinsusedineach
mode.
Table1.USBPins
PinType
(1)
Function
M24XIICrystalinputforM24oscillator(24MHZforUSB)
M24X0OCrystaloutputforM24oscillator
M24V
DD
S1.8VpowersupplyforM24oscillator
M24V
SS
GroundforM24oscillator
PLLV
DD18
GND1.8VoltpowersupplyforPLLs(systemandUSB)
USB_VBUSI/O5VinputthatsignifiesthatVBUSisconnected.TheOTGsectionofthePHYcanalsopullupor
downonthissignalforHNPandSRP.
USB_IDI/OUSB_IDisaninputthatisopenorpulledtogrounddependingonOTGconnectorconfiguration.
ThestatedeterminesifcontrollerstartsinHOSTorPERIPHERALmode.
USB_DPI/OUSBbi-directionalDataDifferentialsignalpair[positive/negative].Input/outputDPsignalofthe
differentialsignalpair.
USB_DMI/OUSBbi-directionalDataDifferentialsignalpair[positive/negative].Input/outputDMsignalofthe
differentialsignalpair.
USB_R1I/OReferencecurrentoutput.Thismustbeconnectedviaa10k1%resistortoUSB_V
SSREF
.
USB_V
SSREF
GNDGroundforreferencecurrent
USB_V
DDA3P3
SAnalog3.3VpowersupplyforUSBphy
USB_V
SSA3P3
GNDAnaloggroundforUSBphy
USB_V
DD1P83
S1.8VI/OpowersupplyforUSBphy
USB_V
SS1P8
GNDI/OGroundforUSBphy
USB_V
DDA1P2LDO
SCorePowersupplyLDOoutputforUSBphy.Thismustbeconnectedvia1µFcapacitorto
USB_V
SSA1P2LDO
.Donotconnectthistoothersupplypins.
USB_V
SSA1P2LDO
GNDCoreGroundforUSBphy.Thismustbeconnectedvia1µFcapacitortoUSB_V
DDA1P2LDO
.
(1)
I=Input,O=Output,Z=Highimpedance,S=Supplyvoltage,GND=Ground,A=Analogsignal
USBcontrollerprovidestwomechanismofaccessingtheendpointcontrolandstatusregisters:
IndexedEndpointControl/StatusRegistersTheseregistersarememory-mappedatoffset410hto
41Fh.TheendpointisselectedbyprogrammingtheINDEXregisterofthecontroller.
Non-indexedEndpointControl/StatusRegistersTheseregistersarememory-mappedatoffset500h
to54Fh.Registersatoffset500h-50FhmaptoEndpoint0;offset510h-51FhmaptoEndpoint1,and
soon.
FordetailedinformationabouttheUSBcontrollerregisters,seeSection4.
SPRUGH3November2008UniversalSerialBus(USB)Controller23
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