Chapter 11: Troubleshooting
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2. Clear CMOS via the front panel or via clear CMOS jumper in order to clear previous defective
DIMM history.
3. Power on the system.
Error Logging
The defective row/DIMM(s) found during this test cannot be logged to the SEL or reported on screen.
Case 2
The system is populated with only one row of memory and the first row memory test encounters a
SBE (Single Bit Error). In this case, the BIOS will write these rows into CMOS history, map out the
only row of DIMMs, and halt the system.
User Notification
This memory test occurs during POST and prior to video sync. Therefore, any error found during this
test will result in the following message displayed on the LCD panel and the system will halt.
“First row test” - displayed on the upper LCD line
“0064MB”
- displayed on the lower LCD line
“ALL DIMM MAP OUT” - displayed on the upper LCD line
Example 1: Consider a system that is populated with only one row of 256 MB DIMMS in the upper
board row 1-4. If an SBE was detected in DIMM 1 during the first row memory test, the following
message will appear on the LCD:
