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VGA DISPLAY PORT
The IRV-686 SBC includes a S3 Virge/DX 3D VGA display controller which interfaces directly to the
local on-board PCI bus. The VGA display port is fully compatible with IBM VGA, EGA, CGA, and
MDA display adapters, and provides improved performance and additional functionality. The S3
Virge/DX 64-bit DRAM-based accelerator combines a 135MHz RAMDAC and clock synthesizer with
the multimedia capabilities including video acceleration, video playback using both software and
hardware sources, live video support and the ability to connect with popular NTSC and PAL
decoders. Additionally, S3 Virge/DX is SVGA-compatible, so as to support legacy DOS applications
and games, and provides high-performance 2D GUI acceleration support for resolutions up to 1280 x
1024 x 256 colors at 75Hz. It also provides support for all major 3D APIs, including OpenGL,
Microsoft's Direct3D and RealityLab, as well as Argonaut BRender and Criterion Renderware. The
board includes 2M-bytes of high speed EDO DRAM. Drivers and programming information can be
obtained directly from S3’s Website http://www.s3.com. Refer to Appendix D for connector
location and pin assignments.
WATCHDOG TIMER
The IRV-686 SBC includes a WatchDog Timer circuit. The WatchDog Timer ensures that if an
application program gets "lost or bombs", the system will reset or a non-maskable interrupt will be
issued to the CPU. The WatchDog Timer is enabled by reading I/O port 443H. Once enabled, the
WatchDog Timer must be triggered by reading I/O port 443H within the time out period, otherwise
the WatchDog Timer will force a hardware reset or activate the IOCHCK/ line, generating a non-
maskable interrupt (NMI). The WatchDog Timer can be disabled by reading I/O port 43H. A
jumper is provided to select the time out period and to enable the WatchDog Timer circuit. Refer to
Appendix E for the WatchDog Timer configuration jumpers.
OPTIONAL PROMDISK-CHIP DISK EMULATOR
The IRV-686 includes a socket designed to accept the MCSI PROMDISK-Chip. The PROMDISK-Chip
Disk Emulator is a unique Flash Memory array which emulates a bootable read/write hard disk
drive. The PROMDISK-Chip is offered in 4M, 8M, 16M, and 32M byte capacities and comes
complete with ROM-DOS version 6.22 installed. The PROMDISK-Chip occupies an 8K block of
memory space above 640K, whose starting address is selected by jumper JP9. The PROMDISK-Chip
uses the Datalight Flash/FX integrated Flash File System and boot utilities. Refer to Appendix E for
the jumper location.
The Flash/FX Variable Block Flash (VBF) File System and ROM-DOS allow the PROMDISK-Chip to
operate as a non-volatile Read/Write disk drive. This means that you can list directories, copy files,
and read and write to the Flash memory on PROMDISK-Chip through standard DOS interrupts and
commands.
HIGH SPEED PCI EXPANSION BUS
The IRV-686 SBC is equipped with a high speed PCI expansion bus which allows the use of high
speed I/O controllers such as SVGA, SCSI, Ethernet Network, and Serial Communications adapters.
The PCI expansion bus is compatible with the PICMG (PCI Industrial Computer Manufacturers
Group) 2.1 standard and supports up to 4 PCI master peripheral boards.
UNIVERSAL SERIAL BUS PORT
The IRV-686 SBC contains two Universal Serial Bus Ports for the future I/O expansion bus. Refer to
Appendix D for connector location and pin assignments.
