Key Features of the TMS320C2xx
1-7
Introduction
Instruction set:
Single-instruction repeat operation
Single-cycle multiply/accumulate instructions
Memory block move instructions for better program/data
management
Indexed-addressing capability
Bit-reversed indexed-addressing capability for radix-2 FFTs
On-chip peripherals:
Software-programmable timer
Software-programmable wait-state generator for program, data, and
I/O memory spaces
Oscillator and phase-locked loop (PLL) to implement clock options:
×1, ×2, ×4, and
÷2 (only ×2 and ÷2 available on ’C209)
CLK register for turning the CLKOUT1 pin on and off (not available on
’C209)
Synchronous serial port (not available on ’C209)
Asynchronous serial port (not available on ’C209)
On-chip scanning-logic circuitry (IEEE Standard 1149.1) for emulation
and testing purposes
Power:
5- or 3.3-V static CMOS technology
Power-down mode to reduce power consumption
Packages:
100-pin TQFP (thin quad flat pack)
80-pin TQFP for the ’C209
