Epson Research and Development Page 33
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Programming Notes and Examples S1D13705
Issue Date: 02/01/22 X27A-G-002-03
Screen 2 Start Address Registers
These three registers form the seventeen bit Screen 2 Start Address. Screen 2 is always
displayed immediately following the screen 1 data and will begin at the left-most pixel on
a line. Keep in mind that if the Screen 1 Vertical Size is equal to or greater than the physical
display then Screen 2 will not be shown.
In landscape mode these registers form the word offset to the first byte in display memory
to be displayed. Changing these registers by one will shift the display image 2 to 16 pixels,
depending on the current color depth.
The S1D13705 does not support split screen operation in portrait mode. Screen 2 will never
be used if portrait mode is selected.
Refer to Table 5-1: “Number of Pixels Panned Using Start Address” to see the minimum
number of pixels affected by a change of one to these registers
Screen 1 Start Address registers, REG[0C], REG[0D] and REG[10] are discussed in
Section 5.2.1 on page 28
REG[0Eh] Screen 2 Display Start Address 0 (LSB)
Start Addr Bit
7
Start Addr Bit
6
Start Addr Bit
5
Start Addr Bit
4
Start Addr Bit
3
Start Addr Bit
2
Start Addr Bit
1
Start Addr Bit
0
REG[0Fh] Screen 2 Display Start Address 1 (MSB)
Start Addr Bit
15
Start Addr Bit
14
Start Addr Bit
13
Start Addr Bit
12
Start Addr Bit
11
Start Addr Bit
10
Start Addr Bit
9
Start Addr Bit
8
