Sharp SGH-T519 Cell Phone User Manual


 
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Circuit Description
5-4
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Synchronous serial port supporting
Programmable 48-bit general-purpose IO unit, keyboard interface, programmable interval
timer and real-time clock.
SD/MMC controller that supports interfacing to secure digital/multimedia memory card.
Two DSP16000 dual-MAC DSP cores;
Up to 404 million MACs per second at 101 MHz.
Memory complement;
- DSP0 : 144K X 16-bit ROM, 40k X 16-bit RAM.
- DSP1 : 96K X 16-bit ROM, 16k X 16-bit RAM.
JTAG boundary scan and integrated H/W developement system Low power;
Ultralow leakage process technology for best-in-class standby
power
Flexible power management modes to allow for maximum active power management
Interprocessor communication hardware support between ARM, DSP0 and DSP1.
Supported by Trident-HPE digital baseband processor software and hardware
developementtoolsaswellasindustry standard ARM software and hardware
developement tools Two on-chip, programmable, PLL clock synthesizers;
- one for ARM and DSP, the other one for USB.