Registers
Register Summary
Bt8960
Single-Chip 2B1Q Transceiver
38
N8960DSB
3.2 Register Summary
Table 3-1. Register Table (1 of 6)
ADDR
(hex)
Register
Label
Read
Write
Bit Number
7 6 5 4 3 2 1 0
0x00 global_modes R/W
hw_revision[
3]
hw_revision[2] hw_revision[1] hw_revision[0] part_id[2] part_id[1] part_id[0] mode
0x01 serial_monitor_source R/W hclk_freq[1] hclk_freq[0] smon[5] smon[4] smon[3] smon[2] smon[1] smon[0]
0x02 mask_low_reg R/W t4 t3 snr meter sut4 sut3 sut2 sut1
0x03 mask_high_reg R/W — — — — sync high_felm low_felm low_snr
0x04 timer_source R/W t4 t3 snr meter sut4 sut3 sut2 sut1
0x05 irq_source R/W — — — — sync high_felm low_felm low_snr
0x06 cu_interface_modes R/W — — — tbclk_pol rbclk_pol fifos_mode
interface_
mode1
interface_
mode[0]
0x07 receive_phase_select R/W — — — — rphs[3] rphs[2] rphs[1] rphs[0]
0x08 linear_ec_modes R/W — — enable_dc_tap
adapt_coefficien
ts
zero_coefficients zero_output adapt_gain[1] adapt_gain[0]
0x09 nonlinear_ec_modes R/W
negate_symb
ol
symbol_
delay[2]
symbol_
delay[1]
symbol_delay[0]
adapt_
coefficients
zero_
coefficients
zero_output adapt_gain
0x0A dfe_modes R/W — — — —
adapt_
coefficients
zero_
coefficients
zero_output adapt_gain
0x0B transmitter_modes R/W —
isolated_
pulse[1]
isolated_
pulse[0]
transmitter_off htur_lfsr data_source[2] data_source[1] data_source[0]
0x0C timer_restart R/W t4 t3 snr meter sut4 sut3 sut2 sut1
0x0D timer_enable R/W t4 t3 snr meter sut4 sut3 sut2 sut1
0x0E timer_continuous R/W t4 t3 snr meter sut4 sut3 sut2 sut1
