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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
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Functional Overview of CIF
The following list gives an overview over the CIF’s functionality:
• 78 MHz system clock
• 78 MHz sensor clock
• 78 MHz JPEG encoder clock
• 32-bit AHB slave programming interface
• ITU-R BT 601 compliant video interface supporting YC
b
C
r
• ITU-R BT 656 compliant video interface supporting YC
b
C
r
data
• 8-bit camera interface
• 12-bit resolution per color component internally
• YC
b
C
r
4:2:2 processing
• Hardware JPEG encoder incl. JFIF1.02 stream generator and programmable quantization and
Huffman tables
• Windowing and frame synchronization
• Continuous resize support
• Frame skip support for video (e.g. MPEG-4) encoding
• Macro block line, frame end, capture error, data loss interrupts and sync. (h_start, v_start) interrupts
• Programmable polarity for synchronization signals
• Luminance/chrominance and chrominance blue/red swapping for YUV input signals
• Maximum input resolution of 3 Mpixels (2048x1536 pixels)
• Main scaler with pixel-accurate up- and down-scaling to any resolution between 3 MP (2048x1536)
and 32x16
• pixel in processing mode
• Buffer in system memory organized as ring-buffer
• Buffer overflow protection for raw data and JPEG files
• Asynchronous reset input, software reset for the entire IP and separate software resets for all sub-
modules
• Interconnect test support
• Semi planar storage format
• Color processing (contrast, saturation, brightness, hue)
• Power management by software controlled clock disabling of currently not needed sub-modules
3. TECHNICAL BRIEF