A SERVICE OF

logo

159
Chapter 10 Standby
5.Operation
5. Operation
5.1 Sleep Mode
Entering sleep mode
Writing “1” to the sleep mode bit (STCR.SLEEP) changes to sleep mode. The device remains in this mode
until an event occurs to wakeup the device from sleep mode.
(See “8. Caution (Page No.165)”.)
Device state in sleep mode
CPU program execution stops. (Peripheral functions continue to operate.)
The internal memory and internal bus halt.
Circuits that halt during sleep mode
Bit search module
All internal memory (inclusive I-cache)
Internal/external bus
Circuits that do not halt during sleep mode
Oscillation circuit, main PLL (if enabled)
Clock generation control circuit
Interrupt controller
External interrupts
•DMA
Peripherals
Recovery and other items
Generation of an interrupt request that is currently enabled changes the device back to RUN mode. (Restores
normal operation.)
An INIT pin input or generation of a watchdog reset invokes an initialization reset (INIT) followed by an
operation reset (RST).