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Chapter 36 Input Capture
5.Operation
5. Operation
The input capture operation is described below.
5.1 Capture Timing, Interrupt Timing
(1) Rising edge of input signal
(2) Internal signal generated by edge detection (synchronous with peripheral clock)
(3) Store free-run timer value in capture register (capture)
(4) Input capture interrupt generation (ICU0-ICU1=“1”)
Reset
Interrupt
request
Free-run
timer 0
count
Time
FFFFh
0000h
Peripheral
clock (CLKP)
Input capture
Active edge
NN+1
Free-run timer 0
N+1
Capture register
Interrupt
request
Input
capture
(1)
(2)
(3)
(4)
NN+1
N+1N+1