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Chapter 37 Output Compare
8.Caution
8. Caution
• Compare stop space during compare operation
As shown below, for one count directly after the compare value is written to the compare register, the
compare operation cannot be used.
• When CMOD=“1” and OCCP0=OCCP1 setting, if a compare match is generated, the port will only reverse
once.
• Compare registers (OCCP0 - OCCP7) are set to the initial values. Always set a value before activating
them.
• When specifying the output level of compare pins (OCU0 - OCU7), first stop the compare operation.
• Output compare is synchronous with the free-run timer, so if you stop the free-run timer the compare
operation also stops.
• Even when reversal mode specification (CMOD) is set to “1” and the compare operation is in cooperative
mode, interrupts are generated independently.
• When using an external clock as the free-run timer, compare-matches and interrupts are generated with the
following clock. To generate compare match output and interrupts, at least “1 clock division” must be input to
the external clock free-run timer after the compare-match.
N-2
N-1 N
N+1 N+2
N+3
X
N
Write to compare register
Compare
timing
Compare stop space
In this case, a match signal
will not be generated!
N-2
N-1 N
N+1 N+2
N+3
X
N
Free-run timer count value
Compare register value
