NEC NDA-24300 Cell Phone User Manual


 
CHAPTER 5 NDA-24300
Page 358
Issue 1
FAULT REPAIR PROCEDURES
Figure 5-9 CPU Controlling Block Diagram (Continued)
LPM
EMA
IOC /
MISC
ISAGT 0
LANI
PWR
PWR
CPU 0
MEMORY
PCI BUS
ISA BUS
CPU board
CPR
CPU clock
CPR
(ST-BY)
Reset Signal
MISC BUS
MISC BUS
ISAGT 1
T
M
T
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
IMG2
PIM 3
PIM 2
PIM 1
PIM 0
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
LC/TRK
MUX
MUX
LC/TRK
PM BUS
PM BUS
IMG3
PIM 3
PIM 2
PIM 1
PIM 0
Note 1: The circuit cards, drawn by dotted lines, indicate they are in STBY state. These cards (TSW, MUX and
DLKC) are totally changed over to the ACT mode, when the MBR key of the active GT (PH-GT09) card is
once flipped. However, PLO (PH-CK16/17/16-A/17-A) is independent and not affected by the development.
Symbols
: Controlling Routes of CPU : Cable
: Circuit card (active) : Circuit card (STBY)
: External Cable : Clock Oscillator
: Signral
EMA: PH-PC40 ISAGT: PZ-GT13
LANI: PZ-PC19 GT: PH-GT09
IOC: PH-IO24 TSW: PH-SW12
DLKC: PH-PC20 PLO: PH-CK16/17/16-A/17-A
MUX: PH-PC36
TSWM
TSW 02 TSW 12 TSW 13TSW 03
PLO 0 PLO 1
DLKC 1
DLKC 0
DLKC 1
GT 1
GT 0
MISC BUS
MISC BUS
MISC BUS
MISC BUS
MISC BUS
MISC BUS
TSW I/O
TSW I/O
TSW
00
TSW
01
TSW
11
TSW
10
To IMG 0To IMG 1 To IMG 1To IMG 0
IOP1
IOP0
TSW/INT TSW/INT TSW/INTTSW/INT
M
U
X
023
M
U
X
022
M
U
X
021
M
U
X
020
M
U
X
033
M
U
X
032
M
U
X
031
M
U
X
030
M
U
X
120
M
U
X
121
M
U
X
122
M
U
X
123
M
U
X
130
M
U
X
131
M
U
X
132
M
U
X
133
TSW
/INT
TSW
/INT
TSW
/INT
TSW
/INT
Note 1
Note 3
Note 2
Note 2: If the ACT/STBY of CPU is once changed over, the system of GT (in TSWM) also changes over.
Note 3: Though an external cable is physically connected between ISAGT0 and GT1, the actual control signal is
sent/received only between ISAGT0 and GT0. This is because GT0 and GT1 are having a multiple connection
on the backboard side. (Refer to Chapter 6, Section 12.)
BUS
BUS
(ST-BY)