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Chapter 7 16-bit Timer
VII - 8
Control Registers
7-2-3 Timer Mode Registers
This is a readable / writable register that controls timer 7.
Timer 7 Mode Register 1 (TM7MD1)
Figure 7-2-13 Timer 7 Mode Register 1 (TM7MD1 : x'03F78', R/W)
TM7CK1
0
TM7CK0
0
1
0
1
1
0
1
fs
TM7IO input
Synchronous TM7IO input
Clock source selection
fosc
01
24
567
3
( At reset : 0 0 1 0 0 0 0 0 )
TM7MD1
TM7CK0TM7CK1
TM7PS0TM7PS1TM7EN
TM7CL
RESERVED
0
1
Disable the count
Timer 7 count control
Enable the count
TM7EN
0
1
Operate timer output
Timer output reset control
Disable timer output (reset)
TM7CL
TM7PS1 TM7PS0
0
1
0
1
1/2 of clock
Count clock selection
1/1 of clock
1/16 of clock
1/4 of clock
Set always "0".
RESERVED
RESERVED