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VIII - 7
Chapter 8 Time Base Timer / 8-bit Free-running Timer
8-bit Free-running Timer
8-3 8-bit Free-running Timer
8-3-1 Operation
8-bit Free-running Timer (Timer 6)
The generation cycle of the timer interrupt is set by the clock source selection and the setting value of the
compare register (TM6OC), in advance. If the binary counter (TM6BC) reaches the setting value of the
compare register, an interrupt is generated at the next count clock, then the binary counter is cleared and
counting is restarted from x'00'.
Table 8-3-1 shows clock source that can be selected.
Table 8-3-1 Clock Source at Timer Operation (Timer 6)
Clock source 1count time
fosc
50 ns
fx
30.5 µs
fs
100 ns
fosc X 1/2
12
204.8 µs
fosc X 1/2
13
409.6 µs
fx X 1/2
12
125 ms
fx X 1/2
13
250 ms
Notes : as
fosc = 20(MHz)
fx = 32.768(kHz)
fs = fosc/2 = 10 MHz
Timer 6 cannot stop its timer counting except at stanby mode (STOP mode).