Panasonic F77G Cell Phone User Manual


 
XI - 51
Chapter 11 Serial Interface 0, 1
Operation
Transfer Rate
Baud rate timer (timer 2 and timer 4) can set any transfer rate.
Tables 11-3-22, 23 show the setup example of the transfer rate. For detail of the baud rate timer setup,
refer to chapter 6. 8-bit Timer.
Timer 4 compare register is set as follows ;
overflow cycle = (set value of compare register + 1) x timer clock cycle
baud rate = 1 / (overflow cycle x 2 x 8) ("8" means that clock source is divided by 8)
therefore,
set value of compare register = timer clock frequency / (baud rate x 2 x 8) - 1
For example, if baud rate should be 300 bps at timer clock source fs/4 (fosc = 8 MHz, fs = fosc/2), set
value should be as follows ;
Set value of comapre register = (8 x 10
6
/ 2 / 4) / (300 x 2 x 8) - 1
= 207
= x'CF'
Timer clock source and the set values of timer compare register at the standard rate are shown on the
following page.
Table 11-3-22 UART Serial Interface Transfer Rate Setup Register
Transfer rate should be selected under 300 kbps.
Table 11-3-23 UART Serial Interface Transfer Rate Setup Register
Setup Register Page
Serial 0 clock source (timer output) SC0CKS XI - 13
Timer clock source selection TM5MD VI - 13
Timer compare register selection TM5OC VI - 8
Setup Register Page
Serial 1 clock source (timer output) SC1CKS XI - 20
Timer clock source selection TM4MD VI - 12
Timer compare register selection TM4OC VI - 8