Panasonic MN101C77C Cell Phone User Manual


 
Chapter 7 16-bit Timer
VII - 4
Control Registers
7-2 Control Registers
Timer 7 contains the binary counter (TM7BC), the compare register 1 (TM7OC1), and its double buffer
preset register (TM7PR1), the compare register 2 (TM7OC2) and its double buffer preset register 2
(TM7PR2), the capture register (TM7IC). The mode register 1 (TM7MD1) and the mode register 2
(TM7MD2) controls timer 7.
Table 7-2-1 16-bit Timer Control Registers
7-2-1 Registers
Table 7-2-1 shows the registers that control timer 7.
R/W : Readable/Writable
R : Readable only
Register Address R/W Function Page
TM7BCL x'03F70' R Timer 7 binary counter (lower 8 bits) VII - 7
TM7BCH x'03F71' R Timer 7 binary counter (upper 8 bits) VII - 7
TM7OC1L x'03F72' R Timer 7 compare register 1 (lower 8 bits) VII - 5
TM7OC1H x'03F73' R Timer 7 compare register 1 (upper 8 bits) VII - 5
TM7PR1L x'03F74' R/W Timer 7 preset register 1 (lower 8 bits) VII - 6
TM7PR1H x'03F75' R/W Timer 7 preset register 1 (upper 8 bits) VII - 6
TM7ICL x'03F76' R Timer 7 capture regsiter (lower 8 bits) VII - 7
TM7ICH x'03F77' R Timer 7 capture register (upper 8 bits) VII - 7
TM7MD1 x'03F78' R/W Timer 7 mode register 1 VII - 8
TM7MD2 x'03F79' R/W Timer 7 mode register 2 VII - 9
TM7OC2L x'03F7A' R Timer 7 compare register 2 (lower 8 bits) VII - 5
TM7OC2H x'03F7B' R Timer 7 compare register 2 (upper 8 bits) VII - 5
TM7PR2L x'03F7C' R/W Timer 7 preset register 2 (lower 8 bits) VII - 6
TM7PR2H x'03F7D' R/W Timer 7 preset register 2 (upper 8 bits) VII - 6
TM7ICR x'03FF1' R/W Timer 7 interrupt control register III - 31
T7OC2ICR x'03FF2' R/W Timer 7 compare register 2 match interrupt contro
l
III - 32
P1OMD x'03F2F' R/W Port 1 output mode register IV - 14
P1DIR x'03F31' R/W Port 1 direction control register IV - 13
Timer 7