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Chapter 9 Watchdog Timer
Control Registers
8
Figure 9-2-1 Watchdog Timer Control Register (WDCTR : x'03F02', R/W)
9-2 Control Registers
The watchdog timer is controlled by the watchdog timer control register (WDCTR).
Watchdog Timer Control Register (WDCTR)
WDTS1
0
WDTS0
0
1
0
1
2
18
of system clock
1
2
22
of system clock
2
20
of system clock
Watchdog time-out period setup
2
16
of system clock
01
24
567
3
( At reset: - - 0 0 0 1 1 0 )
WDCTR
WDEN
WDTS0
WDTS1WDTC0WDTC1
WDTC2
WDTC2
0
WDTC1
0
0
1
1
1
WDTC0
0
1
0
1
0
1
0
1
2
7
of system clock
2
9
of system clock
2
11
of system clock
Watchdog timer is cleared at
the following cycle or more
Anytime
2
19
of system clock
2
13
of system clock
2
15
of system clock
2
17
of system clock
--
WDEN
0
1
Watchdog timer enable
Watchdog timer enable
Watchdog timer disable/clear